1. Field
Embodiments described herein relate generally to a data transfer circuit.
2. Description of Related Art
In the testing of a memory mounted on a semiconductor integrated circuit using a memory BIST (built-in self-test) and of a logic area around the memory using a scan test, paths at a boundary between the memory and a peripheral circuit of the memory are likely to be missed by the tests (see Patent Documents 1 and 2, for example). In the case where a memory is placed at a boundary between two different clock domains (hereinafter simply called an asynchronous boundary) as means for sending and receiving data between the clock domains, in particular, there is a path, around the memory, which neither the memory BIST nor the scan test can cover. In conventional cases, a function test is often required to be additionally employed to test this path. In general, the function test takes long test time. Further, the identification of defective locations for the analysis of defective products is difficult in the function test. For these reasons, the function test is not suitable for use in a mass production test.